by Akin Akturk, PhD, Co-founder, CoolCAD Electronics
High-sensitivity focal plane arrays deployed in low earth orbit (LEO) imaging satellites require readout integrated circuits that operate reliably at liquid nitrogen temperatures of approximately 77 K (minus 196 degrees Celsius). Silicon complementary metal-oxide-semiconductor (CMOS) devices exhibit measurable shifts in threshold voltage, carrier mobility, subthreshold slope, and leakage behavior. When cooled to these temperatures, standard room-temperature SPICE models do not capture these effects. Producing accurate, validated cryogenic SPICE models requires systematic physical characterization across the full operating temperature range and rigorous model extraction against measured data. CoolCAD Electronics has provided this service to aerospace programs, foundries, and government customers since 2005; delivering process design kit (PDK)-ready cryogenic models that give circuit designers a reliable, physics-based baseline for first-pass tape-out.
Why the Readout Circuit Must Operate at 77 K
Most of the electronics on a LEO satellite operate in a thermally controlled warm box near room temperature. In the space environment, heat transfer occurs exclusively by electromagnetic radiation, with no conduction or convection pathway available. A well-insulated enclosure can maintain near-ambient temperatures even in LEO, and satellite bus electronics are routinely designed to that assumption.
The exception is the imaging payload. To achieve the photon noise-limited sensitivity that makes a focal plane array scientifically and operationally useful, the detector array and the readout integrated circuit bonded to it must be cooled to cryogenic temperatures. At 77 K, dark current drops dramatically, thermal noise in the readout circuitry falls, and the overall signal-to-noise ratio of the imaging system improves by orders of magnitude relative to room-temperature operation. Infrared imagers for Earth observation satellites, space-based astronomical imagers, and hyperspectral sensing payloads all depend on readout ICs that function reliably at liquid nitrogen temperature.
What Changes in Silicon at Cryogenic Temperatures
Silicon CMOS remains the dominant technology for readout circuit design at 77 K. Unlike wide-bandgap materials such as silicon carbide, silicon transistors operate well into the cryogenic regime. As temperature falls toward 77 K, threshold voltage increases, carrier mobility rises due to reduced phonon scattering, the subthreshold slope narrows toward its theoretical minimum of approximately 15 mV/decade at 77 K, and junction leakage current drops precipitously. These are largely favorable trends for analog precision, but they shift device operating points far enough from room temperature values that PDKs calibrated at 300 K cannot be used reliably for cryogenic design work.
The circuit designer using room temperature models for a 77 K design is working without a valid reference. Threshold voltage offsets in differential pairs, current levels across bias networks, analog bandwidth, and noise floor behavior all depend on accurately modeled cryogenic device parameters. Obtaining those parameters requires physical measurement at temperature.
What CoolCAD Measures, Delivers
CoolCAD characterizes silicon CMOS devices at temperatures from 4 K to room temperature using cryogenic probe stations with liquid helium and liquid nitrogen cooling. The measurement program covers DC current voltage and capacitance voltage characteristics across all relevant bias conditions, along with low-frequency transient measurements needed to resolve carrier trapping and interface-state dynamics at low temperature. The device matrix spans long-channel and short-channel structures, bulk CMOS, silicon-on-insulator and FinFET configurations, covering thin-oxide and thick-oxide variants across the voltage ranges appropriate to each process node.
From this characterization data, CoolCAD extracts validated SPICE models suitable for direct incorporation into the customer’s PDK. The deliverable is a temperature-parameterized model set that the design team can deploy in their simulation environment, enabling realistic first-pass circuit simulation at 77 K before a wafer is committed to fabrication.
Methodology and Practical Considerations
CoolCAD operates cryogenic probe stations in-house and provides on-site characterization services at both customer and government laboratory facilities. In-house testing handles both die-level and packaged device characterization. For programs where devices cannot leave the customer site (or where specialized infrastructure is available at a national laboratory or foundry facility), CoolCAD engineers travel to the test location, execute the measurement program, and return with validated data for model extraction.
Cryogenic testing is resource-intensive and demands careful planning. Open-cycle liquid helium systems provide roughly 12-15 hours of usable run time per tank, requiring a fully optimized test sequence to capture the complete device matrix within each cooling cycle. Liquid nitrogen offers considerably more flexibility; a single tank supports multiple days of continuous measurement. Model extraction from a full characterization dataset typically requires two to four weeks. Programs with broad device families can extend to a month.
The investment is justified. A cryogenic model set that accurately reflects measured device behavior at 77 K eliminates the design iterations that follow a first tape-out built on room temperature assumptions, and it gives the program a reusable simulation asset for future design cycles on the same process node.
The Road Ahead
Demand for validated cryogenic silicon models is growing across two converging markets. The first is expanding LEO imaging constellation programs which continue to drive new readout IC development cycles. Each new process node requires fresh cryogenic characterization data. The second market, quantum computing control electronics, is a separate but closely related demand driver. It requires 4 K-calibrated models for the classical silicon circuitry that interfaces with qubit arrays. Both markets share the same fundamental requirement: physics-based SPICE models anchored to low temperature measured data rather than extrapolated from room temperature fits.
CoolCAD Electronics has operated at this intersection of cryogenic testing and silicon device modeling since the company’s founding in 2008, carrying forward more than two decades of accumulated measurement methodology, model extraction expertise, and process knowledge across bulk, SOI, and FinFET silicon technologies. For engineering teams developing readout circuits, imaging sensor interfaces, or cryo-compatible analog front ends, that depth of experience is a direct path to first-pass simulation accuracy at the temperatures their designs will actually see in operation.
CoolCAD Electronics is an ISO 9001-certified company located in Greenbelt, MD, with strong ties to the University of Maryland and a portfolio of NASA, DARPA, and Department of Defense programs spanning more than two decades. For more information on cryogenic characterization and modeling services, visit
www.coolcadelectronics.com.
